1. Technical Field
The present invention relates to processes for semiconductor device fabrication that utilize a plasma environment, and integrated circuits made using such processes.
2. Art Background
Plasma processing (i.e. the use of discharge in which the ionization and fragmentation of gases takes place to produce chemically active species) is ubiquitous in processes for fabricating integrated circuits. Plasmas are used to deposit materials on and remove materials from semiconductor substrates during the device fabrication sequence.
Currently, the effects of the plasma on the materials already formed on the substrate when it is exposed to the plasma is under investigation. For example, Gadgil, P. K., et al. "Evaluation and control of device damage in high density plasma etching," J. Vac. Sci. Technol. B:12(1) (1994) observes that plasma exposure during plasma processing may cause stoichiometric damage to a wafer surface, resulting in device performance degradation, and decreased device yield and reliability. For example, plasma etch processes are used to form the polysilicon gate of a semiconductor device. Gadgil et al. observed that plasma processes damage the underlying gate oxide at the source and drain edges of the channel. This damage is in the form of traps or defects in the gate oxide. Gadgil et al. observed that this damage does not significantly affect the measured electron mobility of devices with a channel length of greater than 0.5 .mu.m. However, for shorter channel devices (i.e. a channel length of less than 0.5 .mu.m) the damaged portion of the gate oxide is a significant fraction of the channel length. Consequently, plasma-induced damage to the gate oxide of short channel devices can significantly reduce the electron mobility of these short channel devices.
Even if devices with the plasma-induced damage to the gate oxide perform initially as designed, the plasma-induced damage will speed up the aging degradation of the devices. Consequently, during device operation, some of the devices with plasma-damaged gate oxides will eventually malfunction. This aging degradation is associated with hot-carriers generated under the bias conditions of the device during operation. Since the concentration of hot carriers is greater in short-channel devices than in longer channel devices (devices having a channel length greater than 0.5 .mu.m), aging degradation is greater in short-channel devices than in longer channel devices.
Since plasma processing -induced damage of the gate oxide adversely affects the performance of semiconductor devices having a channel length less than 0.5 .mu.m, a process for reducing such damage is desired.